Je suis intéressé
Neuchâtel / Zürich
Internship in Ultra-low Power Processor Design Optimization
To start as soon as possible and for a duration of six months.
Ultra-low power systems (typically for applications in the Internet-of-things and wearables) need solutions which can further lower the power consumption while supporting more and more features. In particular, processor architecture and design are key to reduce the power consumption of the system on chip.
- Study the state-of-art ultra-low power processors and extract the key processor features (e.g. computational efficiency) needed for ultra-low power applications
- Study different implementation techniques for ultra-low power solutions (e.g. flip-flop or latch-based design, body bias, sub-threshold voltage, technology selection from bulk to FDSOI,...)
- Concretely apply those techniques to several different processor architectures (Cortex, RISC-V, icyflex) by using state-of-the-art CAD tools
- Evaluate the benefits of proposed optimizations in terms of computational efficiency using the EEMBC's ULPBench (standard benchmark for the measure of processors' efficiency)
- Identify possible processor design improvements focusing on ultra-low power applications.
- Student in Microelectronics
- Interest in designing a novel ultra-low power processor
- Understanding of digital integrated circuit design and electronic design in general.
CSEM offers a stimulating and multidisciplinary work environment with the opportunity to work with leading Swiss and international companies. You will have the opportunity to benefit from excellent social security conditions and to evolve within a multicultural company which clearly promotes an employee-driven culture.
We look forward to receiving your complete application file at firstname.lastname@example.org, mentioning ref. 'M121.2017-28' in the subject.
Preference will be given to professionals applying directly.